1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly to a reprogrammable nonvolatile semiconductor memory device.
2. Description of the Related Art
There has been known a semiconductor memory device of the type in which memory cells are constructed with nonvolatile transistors. This type of semiconductor memory device is called a nonvolatile semiconductor memory device. In this type of memory device, two types of data write modes are available. In a first data write mode, data is written into the memory cells of the memory device before the memory device is assembled into a system. For data write, a device exclusively used for writing data into the memory cells, such as a ROM writer, is used. An EPROM may be enumerated for this type of the memory device. In a second data write mode, data is written into the memory cells of the device assembled into a system. The data write operation is under control of various control signals derived from a CPU contained in the system. An EEPROM is an exemplar of this type of the memory device.
In the case of the memory device, such as an EPROM, which is operable in first data write mode using the ROM writer, much time is taken for writing data. Because of this, a special data write sequence is used for the data writing. This sequence is different from that by a CPU in a system to which the memory device is assembled. Accordingly, after data is written into a memory device by a ROM writer, and the device is assembled into a system, it is impossible to reprogram the data stored in the memory device left assembled. Some techniques by which the memory device assembled into a system is reprogrammable have been developed. In these techniques, new problems arise. For example, an intricated system configuration is required for realizing such techniques.
In the memory device, such as an EEPROM, which is operable in the second data write mode, that is, of the type in which after the memory device is assembled into a system, and data write progresses under control of control signals issued from a CPU contained in the system, a usual write sequence, not the special sequence, is used for the data writing. In the second write mode, the durations of the control signals from the CPU are greatly different from a data write time for writing data to the memory device. For example, the former ranges from several tens to several hundreds nS, while the latter several hundreds uS to several mS. To cope with this, a proposal has been made in which a one-shot pulse generator is used for generating a program pulse PGM (write pulse) which rises at the leading end of a WE signal and has a much larger duration than that of the WE signal. This proposal, however, involves another problem that the total of the write time is long. In the case of the memory device having no internal write control means, arrangement is made such that the write time is controlled by an external CPU. Since in such an arrangement, however, the write sequence is intricated, so that it is impossible to write data into the memory device assembled into a system by a ROM writer. As for the memory circuit before it is assembled into a system, the increase of the write time indicates increase of time to manufacture and hence increase of cost to manufacture.